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1、Boundary Scan Overview邊界掃描測試邊界掃描測試測試原理與應用測試原理與應用Intelligent Boundary Scan SolutionsIntelligent Boundary Scan SolutionsBoundary Scan TestBoundary Scan Test測試之定義測試之定義測試之定義測試之定義 所謂所謂邊界邊界(Boundary):係指係指IC腳端與內腳端與內部部(功能邏輯閘功能邏輯閘)晶片間之接點晶片間之接點。換言之進行掃描測試IC腳端與晶片間之接點邊界,係所謂之邊界掃描測試邊界掃描測試。1990年經由IEEE 1149.1加以規格化之B
2、ST測試,俗稱為邊界掃描測試邊界掃描測試(Boundary Scan Test)BScan BasicsIntelligent Boundary Scan SolutionsMore Details on IEEE-1149.1=digital interconnection test IEEE-1149.4=mixed-signal and analog interconnection test IEEE-1149.5=system level test IEEE-1149.6=Differential&AC coupled networks IEEE-1532 =In-System-Pro
3、gramming12/28/20223Intelligent Boundary Scan SolutionsHistory of the Standard1985 JETAG (Joint European Test Action Group)1986 JTAG (Europe and North America)1988 P1149 JTAG v2 (proposal)1990 IEEE Std 1149.1 -19901993 IEEE Std 1149.1a-19931994 IEEE Std 1149.1b-1994 (BSDL)2001 IEEE Std 1149.1 -2001Te
4、rms synonyms with IEEE Std 1149.1Boundary Scan/BSCAN/BSTJTAG (Joint Test Action Group)12/28/20224Intelligent Boundary Scan SolutionsBoundary Scan TestBoundary Scan Test測試之必要性測試之必要性測試之必要性測試之必要性BScan BasicsIntelligent Boundary Scan SolutionsBoundary Scan TestBoundary Scan Test測試之原理測試之原理測試之原理測試之原理(二二二二
5、)若PCB印刷基板採用BScan測試相容元件測試相容元件時,最多僅需5條(通常為通常為4條條)之專用線,即可測試:1.Test Data In (TDI)2.Test Data Out (TDO)3.Test Mode Select (TMS)4.Test Clock (TCK)5.Test Reset (TRST)=可以省略不用可以省略不用 *註註=通常用六個通常用六個Clock,當作一個當作一個Reset BScan BasicsIntelligent Boundary Scan SolutionsBoundary Scan TestBoundary Scan Test測試之原理測試之原理
6、測試之原理測試之原理(三三三三)所謂所謂測試存取埠測試存取埠:TAP(Test Access Port)=係指為進行測試邏輯電路之指令,測試係指為進行測試邏輯電路之指令,測試數據或測試結果等數據加入輸入數據或測試結果等數據加入輸入/輸出之串輸出之串列介面,上述列介面,上述4條信號線,經由外界之電條信號線,經由外界之電腦主機加以控制,以便執行腦主機加以控制,以便執行BScan測試。測試。BScan BasicsIntelligent Boundary Scan SolutionsBoundary Scan TestBoundary Scan Test測試之功能測試之功能測試之功能測試之功能 元件
7、之誤插接及元件之誤插接及臨近元件的短路測試臨近元件的短路測試 外界電路與元件間之外界電路與元件間之輸入輸入/輸出信號輸出信號監視監視 元件間之元件間之互接測試互接測試(Interconnecting Test)可測試可測試BGA元件之開路與短路作測試元件之開路與短路作測試 Non-BGA IC腳的開路測試腳的開路測試 可在板上燒錄資料可在板上燒錄資料(ISP)Flash/EEPROM (ISP)PLD/FPGA Devices 內部邏輯電路之功能測試內部邏輯電路之功能測試BScan BasicsIntelligent Boundary Scan SolutionsTestbus Signals
8、TMS=Test Mode SelectTCK=Test ClockTDI =Test Data InTDO=Test Data OutTMSTCKTDOT A PT A PT A PBScan-deviceBScan-deviceBScan-deviceTDITestbus interconnectionnonBScanICBScan netsIEEE-1149.1Bscan Cell 測試存取埠測試存取埠TAP=Test Access Port12/28/20229Intelligent Boundary Scan SolutionsStandard DeviceCore LogicPin
9、IEEE-1149.112/28/202210Intelligent Boundary Scan SolutionsBScan DeviceTest Data Out(TDO)TCKCore LogicTest Access Port(TAP)Test Mode Select(TMS)Test Data In (TDI)Test Clock (TCK).some extra“intelligence”is needed for Test AccessBScan CellPinIEEE-1149.112/28/202211Intelligent Boundary Scan SolutionsTe
10、st Access Port(TAP)測試存取埠測試存取埠TAP ControllerInstructions RegisterTDOTMSTDITCKBypass RegisterIDcode Register,opt.BScan Register310n000nMUXData RegisterIEEE-1149.112/28/202212Intelligent Boundary Scan SolutionsIEEE-1532In-System ProgrammingProgramming devices(volatile or non-volatile)離散元件離散元件離散元件離散元件 m
11、ounted on a PCB through IEEE-1149.1 compliant TAP=PLD/FPGA Devices Programmable devices compliant to IEEE-1532 have a system mode and a test mode:System mode:differentiates 4 system modal states:Unprogrammed(在未寫入資料前在未寫入資料前)ISC Accessed (ISC Data file寫入寫入)ISC Complete (ISC Data file完成完成)Operational (
12、驗證驗證)Test mode:conform to IEEE-1149.112/28/202213Intelligent Boundary Scan SolutionsConclusionIEEE 1532 can be used for programming ofa single device on a device programmera single device in-systemmultiple devices concurrently in-systemStandard conform devices of different types from different vendo
13、rs can be programmed concurrentlyProgramming algorithm and data are separatedIEEE-1532=In-System-Programming12/28/202214Integration with Flying Probe Tester(BScan+FPT)Intelligent Boundary Scan SolutionsWhat FPT Can TEST?類比元件的值類比元件的值ResistorCapacitorInductorTransistor臨近元件的短路測試臨近元件的短路測試Non-BGA IC腳的腳的
14、開路測試開路測試上電後電壓上電後電壓/電流測試電流測試特性特性無治具無治具 ICT 測試測試簡易型簡易型AOI功能功能速度稍慢速度稍慢可涵蓋所有被動零可涵蓋所有被動零件測試件測試短路測試短路測試為選擇性為選擇性考量考量BScan BasicsIntelligent Boundary Scan SolutionsWhat Boundary Scan Can Test 數位邏輯數位邏輯數位邏輯數位邏輯 IC IC 零件零件零件零件:(包含(包含 BGA)的開短路的開短路測試測試Boundary Scan IC ID檢查檢查DRAM讀寫測試讀寫測試Flash,EEPROM 讀寫讀寫測試及測試及資料在
15、板燒錄資料在板燒錄(On Board programming)特性特性特性特性:測試速度快測試速度快(可在一分鐘之(可在一分鐘之內測完一片主機版)內測完一片主機版)主要針對有提供主要針對有提供 Boundary Scan IC 的量測的量測主要針對主要針對開短路開短路的製程問題的製程問題做測試做測試可分為做治具及不做治具的可分為做治具及不做治具的方法,方法,治具成本遠比治具成本遠比 ICT 治具類便宜。治具類便宜。(因測試點變少因測試點變少)BScan BasicsBoundary Scan Layout information邊界掃描測試邊界掃描測試相容線路設計需知相容線路設計需知Intel
16、ligent Boundary Scan SolutionsIntelligent Boundary Scan Solutions Boundary Scan TestBoundary Scan Test測試之原理測試之原理測試之原理測試之原理若PCB印刷基板採用BScan測試相容元件測試相容元件時,最多僅需5條(通常為通常為4條條)之專用線,即可測試:1.Test Data In (TDI)2.Test Data Out (TDO)3.Test Mode Select (TMS)4.Test Clock (TCK)5.Test Reset (TRST)=可以省略不用可以省略不用 *註註=通常
17、用六個通常用六個Clock,當作一個當作一個Reset BScan BasicsIntelligent Boundary Scan SolutionsI/O Interface,10PIN 100mil公的連接器公的連接器PIN1TCKPIN2GNDPIN3TMSPIN4GNDPIN5TDOPIN6GNDPIN7TDIPIN8GNDPIN9TRSTPIN10NC板子上整個連接到板子上整個連接到 Boundary Scan 的介面連接器的介面連接器BScan BasicsIntelligent Boundary Scan SolutionsTDITCKTMSTDOTDITDO串接方式為串接方式為
18、TMS,TCK,TRST並聯並聯,TDI,TDO串聯串聯BScan BasicsIntelligent Boundary Scan SolutionsBoundary Scan controller 的連接器上的 TDI,接到串接上第一個 BS IC 的 TDI,第一個 BS IC 的 TDO 接第二個 IC 的 TDI,以此類推;最後一個 IC 的 TDO 則接連接器上的 TDO。TDI,TDO串接方式注意串接方式注意BScan BasicsIntelligent Boundary Scan Solutions非同非同 logic level的的 boundary scan chip不可放置
19、在同一個不可放置在同一個 chain 上。上。(如(如CPU的的logic level為為 1.8V,不可與不可與 北橋的北橋的 2.5V 放在同一個放在同一個chain上)上)TCK,TMS訊號需走內層訊號需走內層設計上多採用設計上多採用 IEEE1149.1 相容晶片相容晶片以以提高可測率提高可測率RD設計注意事項設計注意事項BScan BasicsIntelligent Boundary Scan SolutionsBScan BasicsIntelligent Boundary Scan SolutionsBScan BasicsIntelligent Boundary Scan SolutionsBScan BasicsIntelligent Boundary Scan SolutionsBScan BasicsIntelligent Boundary Scan SolutionsBScan BasicsIntelligent Boundary Scan SolutionsBScan BasicsEnd of Presentation