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1、 2004 Altera CorporationTiming Analysis TrainingCytech FAE Jim Lin 2004 Altera Corporation - Confidential2Timing Analysis Outlinen Terminology术语- Quartus II- Customern Input / Output Timing Assignmentsn New Timing Assignments- Clock uncertainty- Max arrival data skew- Max arrival clock skewn Recover
2、y and Removal 覆盖和去除- Asynchronous Analysis n Early Timing Estimationn Latch Analysis 锁存分析n Optimize Fast Cornern Min/max analysis - Fast Corner Models - Slow Corner Models 2004 Altera CorporationTerminology 2004 Altera Corporation - Confidential4Terminologyn Alteras Timing Analysis Terminology can b
3、e Explained to Customers Familiar with an ASIC Design Backgrounds- Try explaining TSU_REQUIREMENT to somebody with an ASIC backgroundn Current Altera Terminology Assumes a Simplistic Analysis- Register to Register fMAX- Pin Based tSU/tH/tCOn Standard Terminology is Based on a More Fundamental Concep
4、t- Meeting or Not Meeting the Micro Requirements of Each Register in the Design 2004 Altera Corporation - Confidential5Terminology ObjectivesnTo Become Familiar With the Customers Understanding of Timing AssignmentsnTo Draw A Connection Between the Customers Timing Assignments and Quartus IIs Timing
5、 AssignmentsnTo Refresh Ourselves with Timing Analysis Terminology and Concepts! 2004 Altera Corporation - Confidential6Quartus IIs Terminologyn Simple Register to Register Analysisinoutclkreg1reg2clkclkclkslack = p2p required p2p delayp2pp2p required = setup relationship + clock skew tCO - tSUsetup
6、 relationship = latch edge launch edgeclock skew = clk clk launchlatch 2004 Altera Corporation - Confidential7Quartus IIs Terminologyn Simple Register to Register Analysis with Numbersinoutclkreg1reg2clkslack = p2p required p2p delayp2pp2p required = setup relationship + clock skew tCO tSUsetup rela
7、tionship = latch edge launch edge= 5.0 0.0 = 5.0 clock skew = clk clk 2.2660.110.082tcotsu0.0820.11= 2.521 - 2.993= 5.0 + (-0.472) 0.11 0.082= 4.336 2.266= -0.472= 4.336tcotsu= 2.072.9932.5212.9932.521 2004 Altera Corporation - Confidential8Quartus IIs TerminologynTiming Analysis Reportslack =p2p re
8、quired = setup relationship + clock skew tCO - tSUsetup relationship = latch edge launch edgeclock skew = clk - clkp2p required p2p delay= 4.336 2.266 = 2.070= 5 + (-0.472) 0.110 0.082 = 4.336= 5.0 0.0 = 5= -0.472 2004 Altera Corporation - Confidential9Standard Definitionsn Understand Timing Assignm
9、ents From the Customers Perspective- ASIC Talkn Customers Terminology- Data Arrival- Clock Arrival- Data Required- Slackn What does each of the above terms mean?n How do they relate to Quartus II Assignments? 2004 Altera Corporation - Confidential10Standard Definition: Data ArrivalnData Arrival Time
10、:- The time the data arrives at the registers .din portinoutclkreg1reg2Data ArrivalclkclkclkLaunchdata arrival = launch + clk + tco +datareg2.din 2004 Altera Corporation - Confidential11Standard Definition: Clock ArrivalnClock Arrival Time:- The time the clock active edge arrives at the registers .c
11、lk portinoutclkreg1reg2LatchData Arrivalclkreg2.dinclkClock Arrivalclock arrival = latch + clkreg2.clk 2004 Altera Corporation - Confidential12Data Required Timeinoutclkreg1reg2Data ArrivalClock Arrivaldata requirement = clock arrival - tsureg2.dinreg2.clktSUData Required 2004 Altera Corporation - C
12、onfidential13Standard Definition: SlacknAm I missing or hitting my requirements?- Slack will Tell You Thisinoutclkreg1reg2Data ArrivalClock ArrivalData RequiredSlack = Data Required Data Arrivalreg2.dinreg2.clktSUslack 2004 Altera Corporation - Confidential14SummaryLaunch edgeLatch edgeInput_delayDa
13、ta arrival timeClock arrival timeData required timetSUslack 2004 Altera Corporation - Confidential15Putting Everything Togethern A connection exist between the customers equations and Quartus IIs equationsdata arrival = launch + clk + tCO + dataclock arrival = latch + clkdata required = clock arriva
14、l - tSUslack = data required data arrivalCustomers ViewQuartus IIs Viewlaunchlatchlatchclkclksetup relationship =clock skew =p2p required = setup relationship+ clock skewtCOtSUslack =p2p required p2p delaylatchlaunchclkclktSUtCOdatadatalaunchclkclktSUtCO 2004 Altera Corporation - Confidential16Slack
15、 Is SlacknSlack Remains the Same- Quartus II Reported a Slack of 2.07nsnUsing Data Arrival Equationsdata arrival = launch + clk + tCO + dataclock arrival = latch + clkdata required = clock arrival - tSUslack = data required data arrival= 0.0 + 2.993 + 0.11 + 2.266 = 5.369= 5.0 + 2.521 = 7.521= 7.521
16、 0.082 = 7.439= 7.439 5.369 = 2.07 2004 Altera Corporation - Confidential17Input / Output Delayn4 I/O Timing Assignments- Input Maximum Delay- Input Minimum Delay- Output Maximum Delay- Output Minimum Delay 2004 Altera Corporation - Confidential18Input Delayn Specifies the allowable Input delay of a
17、 signal from an external register to a Pin- Maximum Maximum Allowable Delay- Minimum Minimum Allowable DelayAltera DeviceExternal DeviceInput Maximum Delay =set_input_delay -clk_ref -to -min | -max - Board Clock SkewExternal Data Delay+ tCO (External)clkSRCDST 2004 Altera Corporation - Confidential1
18、9Output DelaynSpecifies the External Output delay of a signal from a Pin to an external register- Maximum Maximum Allowable Delay- Minimum Minimum Allowable DelayAltera DeviceExternal DeviceOutput Maximum Delay =set_output_delay -clk_ref -to -min | -max External Data Delay - Board Clock Skew + tSU (
19、External)DSTSRCclk 2004 Altera Corporation - Confidential20Board Exampleset_input_delay -clk_ref clk_in -to d_in -max 3.5Input Maximum Delay = External Data Delay + tCO (External) -Board Clock Skew=3+2-(1.0 + 0.5)= 3.5 nsYX= Y + tCO(External) - X 2004 Altera CorporationNew Timing Assignments 2004 Al
20、tera Corporation - Confidential22MAX DATA ARRIVAL SKEWn Allows you to specify the maximum data arrival skew a clock node to registers and/or pinsout1reg1out2reg2srcABCDEF(A + B + C + D) (A + B + E + F) = 3ns(A + B + E + F) (A + B + C + D) = 3nsConstraint Impliesclkdataset_instance_assignment -name M
21、AX_DATA_ARRIVAL_SKEW 3NS -from clk -to reg* 2004 Altera Corporation - Confidential23MAX DATA ARRIVAL SKEWout1reg1out2reg2srcABCDEFclkdata 2004 Altera Corporation - Confidential24Max Clock Arrival Skewn Allows you to specify the maximum clock arrival skew between a set of registersout1reg2reg1clkdata
22、set_instance_assignment -name MAX_CLOCK_ARRIVAL_SKEW 3NS -from clk -to reg* 2004 Altera Corporation - Confidential25Max Clock Arrival Skewout1reg2reg1clkdata 2004 Altera Corporation - Confidential26Clock Uncertaintyn Clock Uncertainty - CLOCK_SETUP_UNCERTAINTY- CLOCK_HOLD_UNCERTAINTYn Used to Analyz
23、e Jitter- Tightens the Clock RequirementCLOCK_HOLD_UNCERTAINTYCLOCK_SETUP_UNCERTAINTYset_clock_uncertainty -from -to -setup set_clock_uncertainty -from -to -hold 2004 Altera CorporationRecovery and Removalor Asynchronous Reset Analysis 2004 Altera Corporation - Confidential28Recovery and Removaln Se
24、tup and Hold analysis where the data path is the asynchronous control signal pathn Primetimes definitions:- RecoverylThe minimum length of time that an asynchronous control input pin (clr/pre) must be stable before the clock active edge- RemovallThe minimum length of time that an asynchronous contro
25、l input pin (clr/pre) must be stable after the clock active edge 2004 Altera Corporation - Confidential29Example: RecoveryReset Arrival TimeClock Arrival TimeTrecoveryClock Arrival Time will include the setup_relationship between the two clocks 2004 Altera Corporation - Confidential30Recovery CheckC
26、lock ArrivalReset ArrivalTrecoveryClock Arrival Time Reset Arrival Time Trecovery 2004 Altera CorporationTiming Analysis Features 2004 Altera Corporation - Confidential32Early Timing Estimationn Provides a early estimate on the delays in a designn A complete Timing Analysis Report will be generatedn
27、 Realistic Estimated Delays Closest To Final Delaysn Optimistic Estimated Delays Exceeds Final Delays n Pessimistic Estimated Delays Falls Below Final Delays-quartus_map -quartus_fit -early_timing_estimate-quartus_tan -timing_analysis_only 2004 Altera CorporationBackupCurrent Status 2004 Altera Corp
28、oration - Confidential34Clock Setup AnalysisnYour setup check passes ifinoutclkreg1reg20ns10ns20ns30ns40nsLatchData ArrivalclkclkclkLaunch- Clock Arrival Time Data Arrival Time tsutsu 2004 Altera Corporation - Confidential35Clock Setup With An Input Delay Constraintinoutclkreg20ns10ns20ns30ns40nsInput DelayinclkinclkClock Arrival Data Arrival tsu