高频电路实训装置英文资料.doc

《高频电路实训装置英文资料.doc》由会员分享，可在线阅读，更多相关《高频电路实训装置英文资料.doc（12页珍藏版）》请在taowenge.com淘文阁网|工程机械CAD图纸|机械工程制图|CAD装配图下载|SolidWorks_CaTia_CAD_UG_PROE_设计图分享下载上搜索。

1、英文资料S3C2442B 32-BIT RISC APPLICATION PROCESSORUSERS MANUALINTRODUCTION This users manual describes SAMSUNGs SC32442B 16/32-bit RISC microprocessor. SAMSUNGs SC32442B is designed to provide hand-held devices and general applications with low-power, and high-performance micro-controller solution in sm

2、all die size. To reduce total system cost, the SC32442B includes the following components. The SC32442B is developed with ARM920T core, 0.13um CMOS standard cells and a memory complier. Its low-power, simple, elegant and fully static design is particularly suitable for cost- and power-sensitive appl

3、ications. It adopts a new bus architecture known as Advanced Micro controller Bus Architecture (AMBA). The SC32442B offers outstanding features with its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache archi

4、tecture with separate 16KB instruction and 16KB data caches, each with an 8-word line length. By providing a complete set of common system peripherals, the SC32442B minimizes overall system costs and eliminates the need to configure additional components. The integrated on-chip functions that are de

5、scribed in this document include: Around 400MHz1.5V arm and 1.5V internal, 300MHz1.35V arm and 1.35V internal, 1.8Vmemory, 3.3V external I/O microprocessor with 16KB I-Cache/16KB D-Cache/MMU External memory controller (SDRAM Control and Chip Select logic) LCD controller (up to 4K color STN and 256K

6、color TFT) with LCD-dedicated DMA 4-ch DMA controllers with external request pins 3-ch UARTs (IrDA1.0, 64-Byte Tx FIFO, and 64-Byte Rx FIFO) 2-ch SPls IIC bus interface (multi-master support) IIS Audio CODEC interface SD Host interface version 1.0 & MMC Protocol version 2.11 compatible 2-ch USB Host

7、 controller / 1-ch USB Device controller (ver 1.1) 4-ch PWM timers / 1-ch Internal timer / Watch Dog Timer 8-ch 10-bit ADC and Touch screen interface RTC with calendar function Camera interface (Max. 4096 x 4096 pixels input support. 2048 x 2048 pixel input support for scaling) 130 General Purpose I

8、/O ports / 24-ch external interrupt source Power control: Normal, Slow, Idle, stop and Sleep mode On-chip clock generator with PLL FEATURES Architecture Integrated system for hand-held devices and general embedded applications. 16/32-Bit RISC architecture and powerful instruction set with ARM920T CP

9、U core. Enhanced ARM architecture MMU to support WinCE, EPOC 32 and Linux. Instruction cache, data cache, write buffer and Physical address TAG RAM to reduce the effect of main memory bandwidth and latency on performance. ARM920T CPU core supports the ARM debug architecture. Internal Advanced Microc

10、ontroller Bus Architecture (AMBA) (AMBA2.0, AHB/APB). System Manager Little/Big Endian support. Support Fast bus mode and Asynchronous bus mode. Address space: 128M bytes for each bank (total 1G bytes). Supports programmable 8/16/32-bit data bus width for each bank. Fixed bank start address from ban

11、k 0 to bank 6. Programmable bank start address and bank size for bank 7. Eight memory banks: Six memory banks for ROM, SRAM, Two memory banks for ROM/SRAM/ Synchronous DRAM. Complete Programmable access cycles for all memory banks. Supports external wait signals to expand the bus cycle. Supports sel

12、f-refresh mode in SDRAM for power-down. Supports various types of ROM for booting (NOR/NAND Flash, EEPROM, and others). NAND Flash Boot Loader Supports booting from NAND flash memory. 4KB internal buffer for booting. Supports storage memory for NAND flash memory after booting. Supports Advanced NAND

13、 flash Cache Memory 64-way set-associative cache with I-Cache (16KB) and D-Cache (16KB). 8words length per line with one valid bit and two dirty bits per line. Pseudo random or round robin replacement algorithm. Write-through or write-back cache operation to update the main memory. The write buffer

14、can hold 16 words of data and four addresses. Clock & Power Manager On-chip MPLL and UPLL: UPLL generates the clock to operate USB Host/Device. MPLL generates the clock to operate MCU at maximum 400MHz1.5V arm and 1.5V internal, 300MHz1.35V arm and 1.35V internal,. Clock can be fed selectively to ea

15、ch function block by software. Power mode: Normal, Slow, Idle, Deep-stop and Sleep mode Normal mode: Normal operating mode Slow mode: Low frequency clock without PLL Idle mode: The clock for only CPU is stopped. Stop mode: All clocks are stopped. Deep-Stop mode: Arm power off internal clocks are sto

16、pped. Sleep mode: The Core power including all peripherals is shut down. Woken up by EINT15:0 or RTC alarm interrupt from Sleep mode Stacked Memory 256Mbit or 512Mbit mSDR x32, VDD=1.8V 512Mbit or 1Gbit Nand Flash x8, VDD=1.8V Interrupt controller 59 Interrupt sources (One Watch dog timer, 5 timers,

17、 9 UARTs, 24 external interrupts, 4 DMA, 2 RTC, 2 ADC, 1 IIC, 2 SPI, 1 SDI, 2 USB, 1 LCD, 1 Battery Fault, 1 NAND and 2 Camera) Level/Edge mode on external interrupt source Programmable polarity of edge and level Supports Fast Interrupt request (FIQ) for very urgent interrupt request Timer with Puls

18、e Width Modulation (PWM) 4-ch 16-bit Timer with PWM / 1-ch 16-bit internal timer with DMA-based or interrupt-based operation Programmable duty cycle, frequency, and polarity Dead-zone generation Supports external clock sources RTC (Real Time Clock) Full clock feature: msec, second, minute, hour, dat

19、e, day, month, and year 32.768 KHz operation Alarm interrupt Time tick interrupt RTC Low Battery Check General Purpose Input/Output Ports 24 external interrupt ports 130 Multiplexed input/output ports DMA Controller 4-ch DMA controller Supports memory to memory, IO to memory, memory to IO, and IO to

20、 IO transfers Burst transfer mode to enhance the transfer rate LCD Controller STN LCD Displays Feature Supports 3 types of STN LCD panels: 4-bit dual scan, 4-bit single scan, 8-bit single scan display type Supports monochrome mode, 4 gray levels, 16 gray levels, 256 colors and 4096 colors for STN LC

21、D Supports multiple screen size Typical actual screen size: 640x480, 320x240, 160x160, and others. Maximum frame buffer size is 4 Mbytes. Maximum virtual screen size in 256 color mode: 4096x1024, 2048x2048, 1024x4096 and others TFT(Thin Film Transistor) Color Displays Feature Supports 1, 2, 4 or 8 b

22、pp (bit-per-pixel) palette color displays for color TFT Supports 16, 24 bpp non-palette true-color displays for color TFT Supports maximum 16M color TFT at 24 bpp mode LPC3600 Timing controller embedded for LTS350Q1-PD1/2(SAMSUNG 3.5” Portrait / 256K-color/ Reflective a-Si TFT LCD) LCC3600 Timing co

23、ntroller embedded for LTS350Q1-PE1/2(SAMSUNG 3.5” Portrait / 256K-color/ Transflective a-Si TFT LCD) Supports multiple screen size Typical actual screen size: 640x480, 320x240, 160x160, and others. Maximum frame buffer size is 4Mbytes. Maximum virtual screen size in 64K color mode : 2048x1024, and o

24、thers UART 3-channel UART with DMA-based or interrupt-based operation Supports 5-bit, 6-bit, 7-bit, or 8-bit serial data transmit/receive (Tx/Rx) Supports external clocks for the UART operation (UEXTCLK) Programmable baud rate Supports IrDA 1.0 Loopback mode for testing Each channel has internal 64-

25、byte Tx FIFO and 64-byte Rx FIFO. A/D Converter & Touch Screen Interface 8-ch multiplexed ADC Max. 500KSPS and 10-bit Resolution Internal FET for direct Touch screen interface Watchdog Timer 16-bit Watchdog Timer Interrupt request or system reset at time-out IIC-Bus Interface 1-ch Multi-Master IIC-B

26、us Serial, 8-bit oriented and bi-directional data transfers can be made at up to 100 Kbit/s in Standard mode or up to 400 Kbit/s in Fast mode. IIS-Bus Interface 1-ch IIS-bus for audio interface with DMA-based operation Serial, 8-/16-bit per channel data transfers 128 Bytes (64-Byte + 64-Byte) FIFO f

27、or Tx/Rx Supports IIS format and MSB-justified data format USB Host 2-port USB Host Complies with OHCI Rev. 1.0 Compatible with USB Specification version 1.1 USB Device 1-port USB Device 5 Endpoints for USB Device Compatible with USB Specification version 1.1 SD Host Interface Normal, Interrupt and

28、DMA data transfer mode(byte, halfword, word transfer) DMA burst4 access support(only word transfer) Compatible with SD Memory Card Protocol version 1.0 Compatible with SDIO Card Protocol version 1.0 64 Bytes FIFO for Tx/Rx Compatible with Multimedia Card Protocol version 2.11 SPI Interface Compatibl

29、e with 2-ch Serial Peripheral Interface Protocol version 2.11 2x8 bits Shift register for Tx/Rx DMA-based or interrupt-based operation Camera Interface ITU-R BT 601/656 8-bit mode support DZI (Digital Zoom In) capability Programmable polarity of video sync signals Max. 4096 x 4096 pixels input suppo

30、rt ( 2048 x 2048 pixel input support for scaling) Image mirror and rotation (X-axis mirror, Y-axis mirror, and 180 rotation) Camera output format (RGB 16/24-bit and YCbCr 4:2:0/4:2:2 format) Operating Voltage Range Core : 1.5V for 400MHz, 1.35V for 300MHz Internal : 1.5V for 400MHz and 1.35V for 300

31、MHz Memory:1.8V for 100MHz or 133MHz I/O : 3.3V / 2.5V Operating Frequency Fclk Up to 400MHz or 300MHz Hclk Up to 133MHz or 100MHz Pclk Up to 66MHz or 50MHz Package 332-FBGA Block Diagram Pin Assignments译文三星S3C2442B 32位精简指令应用处理器用户手册绪言该用户手册描述了三星电子公司生产的SC32442B 16/32位精简指令结构的微处理器。三星电子的SC32442B是设计成用于手持式

32、设备和仅用极小的体积便为手持设备和一般类型应用提供了低功耗、高性能微处理器解决方案。 外部存储器控制器 LCD控制器（）专门LCD DMA控制器 4通道DMA控制器关于外部请求管脚 3通道UART（红外1.0，64字节T FIFO，和64字节R FIFO） 2路SPI总线 IIC总线接口 IIS音频CODEC接口 SD主机接口1.0版本及兼容MMC2.11版本协议 2通道USB主机控制/1通道USB驱动控制器 4通道PWM定时器/1通道内部定时器/看门狗定时器 8通道10位ADC和触摸屏接口 RTC的日历功能 照相机接口（最大支持4096 4096像素输入，支持2048 2048像素浏览输入）

33、 130个通用I/O端口和24通道外部中断源 电源控制：正常模式，低速模式，空闲模式，睡眠模式 单芯片时钟发生器用于锁相环特性 体系结构 结合系统 和内嵌通用的应用程序 16/32位RISC结构和强大的指令设置ARM920T CPU core 内嵌ARM体系结构MMU去支持WinCE， 指令cache、数据cache、读写缓冲. ARM920T内核支持ARMdebug体系. 内建AMBA总线结构2.0版，包括AHB和APB两种总线. System Manager 系统管理 Little/Big Endian support. 支持快速总线模式和异步总线模式 地址空间：每个模块提供128M字节（

34、全部有1G字节） 支持每个模块数据总线可编程8/16/32位 固定模块开始地址从0模块到第6模块 第7模块的开始地址和模块尺寸是可编程的 八个存储器单元：6个存储模块采用ROM，RAM，两个存储单元用于ROM/SRAM/同步DRAM。 完善的可编程访问周期用于所有存储器单元。 支持外部等待信号去延长总线周期 支持自刷新模式在SDRAM用于电源关闭时 支持多种类型的ROM用于导入 与非（NAND）闪存导入设备 支持来自与非（NAND）闪存导入存储器 4KB内部缓冲导入 支持存储存储器用于NAND闪存导入之后 支持高级的NAND闪存 高速缓冲存储器 64路 高速缓存有I-Cache(16K)和D-

35、Cache(16K) 每排8字长有一个有效位和两个无效位每排 Pseudo random or round robin replacement algorithm. Write-through or write-back cache operation to update the main memory. The write buffer can hold 16 words of data and four addresses. 时钟及电源管理 单芯片MPLL和UPLL发生器：UPLL产生的时钟去供USB主机/驱动。MPLL产生的时钟去提供MCU工作，最大400MHz1.5V 每个功能模块可通

36、过软件来选择时钟 电源模式：正常模式，低速模式，空闲模式和睡眠模式 正常模式：正常工作模式 低速模式：低时钟频率没有锁相环 空闲模式：只有CPU时钟被关闭 关闭模式：所有的时钟都关闭 深睡眠模式：ARM电源关闭内部时钟停止 睡眠模式：Core电源包括所有外围是关闭。 启动通过EINT15:0或RTC警告中断来唤醒睡眠模式 堆栈存储器 256Mbit or 512Mbit mSDR x32, VDD=1.8V 256Mbit或512Mbit mSDR x32, 512Mbit or 1Gbit Nand Flash x8, VDD=1.8V 中断控制器 59个中断源（1个是看门狗中断源，5个定时

37、中断源，9个串口中断源，24个中断源，4路DMA中断，2个RTC中断，2个ADC中断，1个IIC中断，2个SPI中断，2USB中断，1个SDI中断，1个LCD中断，1个电池检测中断，1个NAND中断和2相机中断）。 可选电平触发或者边沿触发方式的外部中断源。 可编程边沿触发或电平触发优先级。 支持FIQ中断模式响应紧急事件。 脉冲调制（PWM）定时器 4通道16位定时器为PWM/每通道16位内部定时器是基于DMA或基于中断工作 可编程工作周期，频率和极性 死区的产生 支持外部时钟源 （实时时钟） 全时钟特性：微秒，秒，分，时，日，月，年 32.768KHz工作频率 中断警告 定时中断应答 RT

38、C电池电压检测 通用输入/输出端口 24个外部中断端口 130多用途输入/输出端口 DMA控制器 4个通道DMA控制器 支持存储器到存储器，IO到存储器，存储器到IO，IO到IO的传送。 支持脉冲传送模式提高传送速率 LCD控制器及STN LCD显示特点 支持3种类型的STN LCD面板：4位扫描信号，8位扫描信号显示模式 支持单色模式，4灰度级和16灰度级，256色和4096色用于STN LCD 支持多种屏幕尺寸 现有典型的屏幕尺寸：640x480,320x240,160x160等等 最大缓存结构尺寸是4M字节 最大有效屏幕尺寸， （细薄膜晶体管）彩色显示器特点 支持每像素1，2，4或8位调

39、色板的TFT彩色显示器 支持16，24bpp无调色板真彩色TFT颜色显示器。 支持24bpp最大16万TFT色彩模式 LTS350Q1-PD1/2内嵌LPC3600定时控制器 LTS350Q1-PE1/2内嵌LCC3600定时控制器 支持多种屏幕尺寸 现有典型的屏幕尺寸：640x480,320x240,160x160等等。 最大缓存结构尺寸是4M字节 最大有效屏幕尺寸64K彩色模式 串口 3通道UART是基于DMA 或者基于中断工作方式。 支持5位，6位，7位，八位串行数据传送和接收 支持外部时钟提供UART工作 可编程波特率 支持红外DA1.0版本 支持循环测试模式 每个通道有内部64字节T

40、 FIFO和64字节R FIFO A/D转换和触摸屏接口 8通道多路ADC 最大500KSPS和10位 内部FET用于直接触摸屏接口 Watchdog Timer 看门狗定时器 位看门狗定时器 中断请求或者系统定时复位 IIC-Bus Interface 接口 1个通道双主线IIC总线 串行 单向和双向数据传送，支持标准模式100K 或者快速模式400K 接口 1个通道IIS用于DMA工作的音频接口 串行，每通道 位数据传送 128 Bytes (64-Byte + 64-Byte) FIFO for Tx/Rx 支持IIS格式和最高有效位格式 主机 2个USB主机端口 兼容OHCI 1.0版

41、本 兼容1.1版本USB技术规范 驱动 1个USB驱动端口 5个终点用于USB驱动 兼容1.1版本USB技术规范 主机接口 标准模式、中断模式和DMA数据传送模式（字节，半字、字传送） 支持4个DMA访问 兼容1.0版本SD存储卡协议 兼容1.0版本SD IO卡协议 支持64字节快进快出（FIFO）用于T/R 兼容2.11版本多媒体存储卡协议 接口 支持2.11版本的两通道外部串行接口 移位寄存器用于 T 中断 工作 照相机接口 支持ITU-R BT 601/656 8-bit mode support 模式 DZI (Digital Zoom In) 性能 可编程视频同步信号极性 支持最大输

42、入图像4096 x 4096(支持扫描2048 x 20 48 像素) 支持图像镜像和旋转（X轴旋转，Y轴旋转和180旋转） Camera output format (RGB 16/24-bit and YCbCr 4:2:0/4:2:2 format) Operating Voltage Range 工作电压范围 Core核心 : 1.5V for 400MHz, 1.35V for 300MHz Internal 内部: 1.5V for 400MHz and 1.35V for 300MHz Memory存储器:1.8V for 100MHz or 133MHz I/O : 3.3V / 2.5V Operating Frequency 工作频率 Fclk Up to 400MHz or 300MHz Hclk Up to 133MHz or 100MHz Pclk Up to 66MHz or 50MHz Package 封装 332-FBGA