《最新SoC设计方法与实现第十四章 IO环设计2(共20张PPT课件).pptx》由会员分享，可在线阅读，更多相关《最新SoC设计方法与实现第十四章 IO环设计2(共20张PPT课件).pptx（20页珍藏版）》请在taowenge.com淘文阁网|工程机械CAD图纸|机械工程制图|CAD装配图下载|SolidWorks_CaTia_CAD_UG_PROE_设计图分享下载上搜索。
1、SoC设计方法与实现设计方法与实现郭炜郭炜 郭筝郭筝 谢憬谢憬第十四章第十四章I/O设计设计(shj)及封装及封装（二）（二）第一页，共二十页。 OutlinesBasic structure of I/O cellsNoise Cancellation ESD Protection SchemeI/O ring designPackage Selection第二页，共二十页。Package FunctionsSignal distributionPower distributionHeat dissipationCircuit support and protection from envi
2、ronmentA space transformer between the fine pitch grid of IC and the PCB (Printed Circuit Board) pitch grid第三页，共二十页。SingulationMoldingSolder Ball AttachPackaging Process SawingWire BondingDieDie AttachWaferWireSubstratePackingFinal TestSolder BallMolding Compound第四页，共二十页。Typical IC PackageBall Grid
3、Array (BGA)Small Outline PackageDual-In-Line PackagePlastic Pin Grid ArrayPlastic Quad Flat PackageChip Scale Package (CSP)System In Package (SIP)Plastic Leaded Chip CarrierThin Outline Package第五页，共二十页。Industry Packing Trends第六页，共二十页。Ball Grid Array (BGA) BGA is a die-up design, plastic over-molded
4、BGA using 2-4 layer BT substrate 第七页，共二十页。More Advantage of BGAImproved electrical performance due to shorter distance between the chip and the solder ballsImproved thermal performance by use of thermal vias, or heat dissipation through power and ground plane incorporated in the substrateReduced han
5、dling-related lead damages due to use of solder balls instead of metal leadsWhen reflow attached to boards, the solder balls self align leading to higher manufacturing yields第八页，共二十页。Flip Chip PackagesPros Good electrical performance(reduced inductance) Good thermal performance w/heat sink Large num
6、ber of die pads per die areaSmall die size and low package heightCons High cost solution Board level reliability concernsDirect solder bumping onto the die, placing the interconnection bump directly onto the substrate, eliminating the need for wire bonding. SUBSTRATE(Organic or Ceramic)CHIPSolder bu
7、mpSolder ball第九页，共二十页。Solder BallPolymer 1Redistribution MetalChipPolymer 1Solder BallPassivationUBMChipSi WaferSolderUBMPassivationWafer Scale CSP第十页，共二十页。Multi Chip Package (MCP)It also called SiP (System in Package)High performance nLow noisenLow power consumptionnOptimizing board space Commonly
8、used in handheld applicationProblem: reduced assembly yield, high testing cast第十一页，共二十页。Package DriversElectricalThermalMechanicalCostPackage Body SizeI/O CountDie SizeReliabilityPackage Selection Process第十二页，共二十页。Thermal EffectPower consumption generates heat and raises temperatureCircuit performan
9、ce degrades due to slower MOSFET switching speed in high temperatureMore susceptible to reliability problems in higher temperaturenOxide breakdownnHot-electron effectnHigher leakage current第十三页，共二十页。Thermal Performance and ImprovementlAdding thermal pads to improve thermal performancelA typical Powe
10、r BGA (PBGA) Structure:Thermal simulationThermal BallsPBGA has thermal path through thermal via and ball第十四页，共二十页。Packaging General GuidelinesPackages affect both power supply delivery and signal integrityWirebond packagesnAlways use package with a ground planenNever use for high power designs (too
11、much IR drop, noise)nNever use above 4GbpsFlip Chip packagesnAlways use for 4+GbpsnAlways use for high power systemsnCan be the best power, best performancenMore knowledge needed to buildnCan be built poorly 第十五页，共二十页。3C Package Evolution第十六页，共二十页。Package Technology TrendsReduction in Area, Volume a
12、nd Weight Increased I/O Count Improved Thermal / Electrical Performance Improved Reliability Potential for Multi-Chip Package, System In Package Reduced Capital Cost for Assembly and Test Green Products (Pb-Free, Halogen-Free)第十七页，共二十页。ConclusionslThere is no one package for all applicationslFlip Ch
13、ip provides the best electrical performancelPBGA provides the best thermal performancelLeaded packages provide the best board level reliability performancelThe right package is the one that can meet all the requirements and constraints of the application for the least cost第十八页，共二十页。SoC设计方法与实现设计方法与实现郭炜郭炜 郭筝郭筝 谢憬谢憬Thank you第十九页，共二十页。内容(nirng)总结第十四章。Dual-In-Line Package。Flip Chip packages。Package Technology Trends。Increased I/O Count。Green Products (Pb-Free, Halogen-Free)。Thank you第二十页，共二十页。