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1、精选优质文档-倾情为你奉上HUNAN UNIVERSITY数字电子技术课程设计报告设计课题：洗衣机控制电路设计学生姓名：王建平学生学号：专业班级：08级自动化1班学院名称：电气与信息工程学院 指导教师：叶佳卓专心-专注-专业一 课程设计的目的：1、能够全面巩固和应用“电子技术基础数字部分”课程中所学的基本理论和方法，并初步掌握小型数字系统设计的基本方法。2、掌握VHDL语言编制小型模块的方法，并采用层次化设计。3、培养电路设计能力，懂得理论设计与实物实现的有效结合。4、掌握Altium Designer软件的应用。二 总体方案分析及选择:洗衣机电路包含有总的控制模块,洗涤控制模块,洗涤记时模块
2、,电动机控制模块以及LCD液晶板的动态显示模块.经过分析后,我们把前四个模块进行组合,把他们合成一个模块即:总控制模块.他们之间的逻辑联结关系，是对数电课程的一个很好总结，也是自己对新知识（LCD液晶板的动态显示）学习理解运用能力的一个很好的提升机会。三 基本功能要求:1 要求设计制作一个普通功能洗衣机控制电路,使之能控制洗衣机的进水阀,排水阀,洗涤程序电机,甩干驱动装置等按预定程序工作.总体过程包括:进水 浸泡 洗涤 排水 甩干五个过程.进水从电路启动开始.其中浸泡可供选择,洗涤时间可以预置,洗涤结束时发出铃声进行提示并自动切断电源.发生故障如:缺水或进水超时 排水超时 甩干碰桶等时也可自动
3、切断电源!2 根据洗衣机工作时不同的洗衣服数量，我们设计了三个档（duoxi zhongxi shaoxi）来对洗衣机的进水 浸泡 洗涤 排水 甩干的五个过程分别预置时间。以此来区分洗衣机不同洗衣数量下的工作状态。3 用中小规模集成电路芯片或CPLD/FPGA设计符合上述任务要求的电路,并制作出能实际运行的装置.4 安装并调试电路,测试各部分电路功能或模型.5 演示并交验硬件装置.下载实现图:四 总控制模块的生成程序 library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_arith.all;use ieee.std_logic_
4、unsigned.all;entity washer is port( clk0, clk1, rst, alarm: in std_logic;-clk0:控制开关脉冲.clk1:记时开关脉冲.Rst:复位端.alarm报警输入端.- duoxi,zhongxi,shaoxi : in std_Logic;-qiangxi:强洗输入端。zhongxi:中洗输入端。ruoxi：弱洗输入端。- water_in, water_out, immersion, dry, z1, z2, voice, poweroff: out std_logic;-进水,出水,浸泡,甩干,洗涤,响铃,断电输出端-
5、display_th, display_tl: out std_logic_vector(3 downto 0)-输出时间显示高位低位输出端- );end entity washer;architecture behave of washer issignal js, js_ten : std_logic;signal im, im_ten : std_logic;signal wa, wa_ten : std_logic;signal wa1, wa2, pwf: std_logic;signal cs, cs_ten : std_logic;signal dr, dr_ten : std_
6、logic;signal xl, xl_ten : std_logic;signal js_dh, js_dl: std_logic_vector(3 downto 0);signal im_dh, im_dl: std_logic_vector(3 downto 0);signal wa_dh, wa_dl: std_logic_vector(3 downto 0);signal cs_dh, cs_dl: std_logic_vector(3 downto 0);signal dr_dh, dr_dl: std_logic_vector(3 downto 0);signal xl_dh,
7、xl_dl: std_logic_vector(3 downto 0);signal dis_th,dis_tl: std_logic_vector(3 downto 0);signal water_inh, water_inl, im_th, im_tl, wash_th: std_logic_vector(3 downto 0);signal wash_tl, water_outh, water_outl, dry_th, dry_tl: std_logic_vector(3 downto 0);begin-控制:控制器件实现洗衣机的功能:进水-浸水-洗涤-出水-甩干 control:pr
8、ocess(clk0, rst,alarm,duoxi,zhongxi,shaoxi)variable n: integer; begin if duoxi=1 and zhongxi=0 and shaoxi=0 then water_inh=0001; water_inl=0010; im_th=1001; im_tl=0000; wash_th=1001; wash_tl=0000; water_outh=0001; water_outl=0010; dry_th=1001; dry_tl=0000; elsif duoxi=0 and zhongxi=1 and shaoxi=0 th
9、en water_inh=0000; water_inl=0110; im_th=0110; im_tl=0000; wash_th=0110; wash_tl=0000; water_outh=0000; water_outl=0110; dry_th=0110; dry_tl =0000; elsif duoxi=0 and zhongxi=0 and shaoxi=1 then water_inh=0000; water_inl=0110; im_th=0011; im_tl=0000; wash_th=0011; wash_tl=0000; water_outh=0000; water
10、_outl=0110; dry_th=0011; dry_tl =0000; else water_inh=0000; water_inl=0000; im_th=0000; im_tl=0000; wash_th=0000; wash_tl=0000; water_outh=0000; water_outl=0000; dry_th=0000; dry_tl =0000; end if; if alarm = 1 then pwf = 1; else if rst = 1 then n := 0; im_ten = 0; js_ten = 0; wa_ten = 0; cs_ten = 0;
11、 dr_ten = 0; xl_ten = 0; pwf = 0; elsif clk0 = 1 and clk0 event then if n = 0 then if water_inh = 0000 and water_inl = 0000 then n := 1; else js_ten = 1; if js = 1 then n := 1; end if; end if; elsif js = 0 and n = 1 then if im_th = 0000 and im_tl = 0000 then n := 2; else im_ten = 1; if im = 1 then n
12、 := 2; end if; end if; elsif im = 0 and n = 2 then if wash_th = 0000 and wash_tl = 0000 then n := 3; else wa_ten = 1; if wa = 1 then n := 3; end if; end if; elsif wa = 0 and n = 3 then if water_outh = 0000 and water_outl = 0000 then n := 4; else cs_ten = 1; if cs = 1 then n := 4; end if; end if; els
13、if cs = 0 and n = 4 then if dry_th = 0000 and dry_tl = 0000 then n := 5; else dr_ten = 1; if dr = 1 then n := 5; end if; end if; elsif dr = 0 and n = 5 then xl_ten = 1; if xl = 1 then n := 6; end if; elsif xl = 0 and n = 6 then pwf = 1; end if; end if; end if; end process;-记时-进水记时-js_jishiqi:process
14、(clk1, js_ten,water_inh,water_inl)beginif js_ten = 0 then js_dh = water_inh; js_dl = water_inl; js = 0;elsif clk1 = 1 and clk1 event then if js_dh = 0000 and js_dl = 0000 then js = 0; else js = 1; if js_dl = 0000 then js_dl = 1001; js_dh = js_dh - 1; else js_dl = js_dl - 1; end if; end if;end if;end
15、 process;-浸泡记时-im_jishiqi:process(clk1, im_ten,im_th,im_tl)beginif im_ten = 0 then im_dh = im_th; im_dl = im_tl; im = 0;elsif clk1 = 1 and clk1 event then if im_dh = 0000 and im_dl = 0000 then im = 0; else im = 1; if im_dl = 0000 then im_dl = 1001; im_dh = im_dh - 1; else im_dl = im_dl - 1; end if;
16、end if;end if;end process;-洗涤记时-wa_jishiqi:process(clk1, wa_ten,wash_th,wash_tl)variable m: integer;beginif wa_ten = 0 then wa_dh = wash_th; wa_dl = wash_tl; wa = 0; wa1 = 0; wa2 = 0; m := 0;elsif clk1 = 1 and clk1 event then if wa_dh = 0000 and wa_dl = 0000 then wa = 0; wa1 = 0; wa2 = 0; else wa =
17、1; if m = 0 then wa1 = 1; wa2 = 1; elsif m = 10 then wa1 = 0; wa2 = 1; elsif m = 13 then wa1 = 1; wa2 = 0; elsif m = 23 then wa1 = 0; wa2 = 0; elsif m = 26 then m := 0; wa1 = 1; wa2 = 1; end if; m := m + 1; if wa_dl = 0000 then wa_dl = 1001; wa_dh = wa_dh - 1; else wa_dl = wa_dl - 1; end if; end if;
18、end if;end process;-出水记时-cs_jishiqi:process(clk1, cs_ten,water_outh,water_outl)beginif cs_ten = 0 then cs_dh = water_outh; cs_dl = water_outl; cs = 0;elsif clk1 = 1 and clk1 event then if cs_dh = 0000 and cs_dl = 0000 then cs = 0; else cs = 1; if cs_dl = 0000 then cs_dl = 1001; cs_dh = cs_dh - 1; el
19、se cs_dl = cs_dl - 1; end if; end if;end if;end process;-甩干记时-dr_jishiqi:process(clk1, dr_ten,dry_th,dry_tl)beginif dr_ten = 0 then dr_dh = dry_th; dr_dl = dry_tl; dr = 0;elsif clk1 = 1 and clk1 event then if dr_dh = 0000 and dr_dl = 0000 then dr = 0; else dr = 1; if dr_dl = 0000 then dr_dl = 1001;
20、dr_dh = dr_dh - 1; else dr_dl = dr_dl - 1; end if; end if;end if;end process;-响铃记时-xl_jishiqi:process(clk1, xl_ten)beginif xl_ten = 0 then xl_dh = 0010; xl_dl = 0000; xl = 0;elsif clk1 = 1 and clk1 event then if xl_dh = 0000 and xl_dl = 0000 then xl = 0; else xl = 1; if xl_dl = 0000 then xl_dl = 100
21、1; xl_dh = xl_dh - 1; else xl_dl = xl_dl - 1; end if; end if;end if;end process;-显示时间-xianshishijian: process(clk1, js_ten, im_ten, wa_ten,cs_ten,dr_ten,xl_ten)begin if js_ten = 1 and im_ten = 0 and wa_ten = 0 and cs_ten = 0 and dr_ten = 0 and xl_ten = 0 then if clk1 = 1 and clk1 event then dis_th =
22、 js_dh; dis_tl = js_dl; end if; elsif im_ten = 1 and wa_ten = 0 and cs_ten = 0 and dr_ten = 0 and xl_ten = 0 then if clk1 = 1 and clk1 event then dis_th = im_dh; dis_tl = im_dl; end if; elsif wa_ten = 1 and cs_ten = 0 and dr_ten = 0 and xl_ten = 0 then if clk1 = 1 and clk1 event then dis_th = wa_dh;
23、 dis_tl = wa_dl; end if; elsif cs_ten = 1 and dr_ten = 0 and xl_ten = 0 then if clk1 = 1 and clk1 event then dis_th = cs_dh; dis_tl = cs_dl; end if; elsif dr_ten = 1 and xl_ten = 0 then if clk1 = 1 and clk1 event then dis_th = dr_dh; dis_tl = dr_dl; end if; elsif xl_ten = 1 then if clk1 = 1 and clk1
24、 event then dis_th = xl_dh; dis_tl = xl_dl; end if; end if;end process;-输出- output:process(dis_th, dis_tl, im, js, cs, dr, wa1, wa2, xl, pwf) begin display_th = dis_th; display_tl = dis_tl; immersion = im; water_in = js; water_out = cs; dry = dr; z1 = wa1; z2 = wa2; voice = xl; poweroff = pwf; end p
25、rocess;end behave;测试文件：- VHDL Testbench for washer- 2010 11 26 21 48 4- Created by EditVHDL- Copyright (c) 2002 Altium Limited-Library IEEE;Use IEEE.std_logic_1164.all;Use IEEE.std_logic_textio.all;Use STD.textio.all;-entity Testwasher isend Testwasher;-architecture stimulus of Testwasher is file RE
26、SULTS: TEXT open WRITE_MODE is results.txt; procedure WRITE_RESULTS( alarm: std_logic; clk0: std_logic; clk1: std_logic; display_th: std_logic_vector(3 downto 0); display_tl: std_logic_vector(3 downto 0); dry: std_logic; duoxi: std_logic; immersion: std_logic; poweroff: std_logic; rst: std_logic; sh
27、aoxi: std_logic; voice: std_logic; water_in: std_logic; water_out: std_logic; z1: std_logic; z2: std_logic; zhongxi: std_logic ) is variable l_out : line; begin write(l_out, now, right, 15); write(l_out, alarm, right, 2); write(l_out, clk0, right, 2); write(l_out, clk1, right, 2); write(l_out, displ
28、ay_th, right, 5); write(l_out, display_tl, right, 5); write(l_out, dry, right, 2); write(l_out, duoxi, right, 2); write(l_out, immersion, right, 2); write(l_out, poweroff, right, 2); write(l_out, rst, right, 2); write(l_out, shaoxi, right, 2); write(l_out, voice, right, 2); write(l_out, water_in, ri
29、ght, 2); write(l_out, water_out, right, 2); write(l_out, z1, right, 2); write(l_out, z2, right, 2); write(l_out, zhongxi, right, 2); writeline(RESULTS, l_out); end procedure; component washer port ( alarm: in std_logic; clk0: in std_logic; clk1: in std_logic; display_th: out std_logic_vector(3 downt
30、o 0); display_tl: out std_logic_vector(3 downto 0); dry: out std_logic; duoxi: in std_logic; immersion: out std_logic; poweroff: out std_logic; rst: in std_logic; shaoxi: in std_logic; voice: out std_logic; water_in: out std_logic; water_out: out std_logic; z1: out std_logic; z2: out std_logic; zhon
31、gxi: in std_logic ); end component; signal alarm: std_logic; signal clk0: std_logic; signal clk1: std_logic; signal display_th: std_logic_vector(3 downto 0); signal display_tl: std_logic_vector(3 downto 0); signal dry: std_logic; signal duoxi: std_logic; signal immersion: std_logic; signal poweroff: std_logic; signal rst: std_logic; signal shaoxi: std_logic;