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1、MOSMOS工艺讲解工艺讲解2022-4-29silicon substratesourcedraintop oxidemetal connection to sourcemetal connection to gatemetal connection to drainpolysilicon gatedoped siliconfield oxidegate oxide2022-4-29silicon substratefield oxide2022-4-29silicon substrate2022-4-29Shadow on photoresistExposed area of photor
2、esistChrome platedglass maskUltraviolet Lightsilicon substrate2022-4-29非感光区域非感光区域silicon substrate感光区域感光区域2022-4-29Shadow on photoresistsilicon substratephotoresist2022-4-29silicon substratesilicon substrate腐蚀腐蚀2022-4-29silicon substratesilicon substratefield oxide去胶去胶2022-4-29silicon substratethin
3、oxide layer2022-4-29silicon substrategate oxide2022-4-29silicon substrategateultra-thin gate oxidepolysilicongate2022-4-29silicon substrategateScanning direction of ion beamimplanted ions in active region of transistorsImplanted ions in photoresist to be removed during resist strip. sourcedrainion b
4、eam2022-4-29silicon substrategatesourcedraindoped silicon2022-4-29自自对对准工准工艺艺在有源区上覆盖一层薄氧化层在有源区上覆盖一层薄氧化层淀积多晶硅，用多晶硅栅极版图淀积多晶硅，用多晶硅栅极版图刻蚀多晶硅刻蚀多晶硅以多晶硅栅极图形为掩膜板，刻以多晶硅栅极图形为掩膜板，刻蚀氧化膜蚀氧化膜离子注入离子注入2022-4-29silicon substratesourcedrain2022-4-29silicon substratecontact holesdrainsource2022-4-29silicon substratecon
5、tact holesdrainsource2022-4-29完整的完整的简单简单MOS晶体管晶体管结结构构silicon substratesourcedraintop oxidemetal connection to sourcemetal connection to gatemetal connection to drainpolysilicon gatedoped siliconfield oxidegate oxide2022-4-29CMOSFETP型型 si subn+n+p+p+2022-4-29VDDP阱工艺阱工艺N阱工艺阱工艺双阱工艺双阱工艺P-P+P+N+N+P+N+VSS
6、VOUTVINVDDN-P+P+N+N+P+N+VSSVOUTVINVDDP-P+P+N+N+P+N+VSSVOUTVINN-SiP-SiN-I-SiN+-Si2022-4-29 N-Si-衬底 P-well P-wellP-well N+ N+ P+ P+ N+ P+N-SiP2022-4-29具体步骤如下：具体步骤如下：1生长二氧化硅（湿法氧化）：生长二氧化硅（湿法氧化）： S i - 衬底 S i O2Si(固体固体)+ 2H2O SiO2（固体）（固体）+2H22022-4-292022-4-292P阱光刻：阱光刻：光源光源2022-4-292022-4-29P+P-well3P阱掺杂
7、：阱掺杂：2022-4-292022-4-29电流电流积分积分器器2022-4-29有源区有源区：nMOS、PMOS 晶体管形成的区域晶体管形成的区域P+N+N+P+N-SiP-wellP-wellP-well 淀积氮化硅淀积氮化硅 光刻有源区光刻有源区 场区氧化场区氧化 去除有源区氮化硅及二氧化硅去除有源区氮化硅及二氧化硅SiO2隔离岛隔离岛2022-4-29有源区depositednitride layer有源区光刻板N型p型MOS制作区域(漏-栅-源)2022-4-29P-well1. 淀积氮化硅：淀积氮化硅：氧化膜生长（湿法氧化）氧化膜生长（湿法氧化）P-well氮化膜生长氮化膜生长P
8、-well涂胶涂胶P-well对版曝光对版曝光有源区光刻板有源区光刻板2. 光刻有源区：光刻有源区：2022-4-29P-well显影显影P-well氮化硅刻蚀去胶氮化硅刻蚀去胶3. 场区氧化：场区氧化：P-well场区氧化（湿法氧化）场区氧化（湿法氧化）P-well去除氮化硅薄膜及有源区去除氮化硅薄膜及有源区SiO22022-4-29P-well去除氮化硅薄膜及有源区去除氮化硅薄膜及有源区SiO2P-wellP+N+N+P+N-SiP-well栅极氧化膜栅极氧化膜多晶硅栅极多晶硅栅极 生长栅极氧化膜生长栅极氧化膜 淀积多晶硅淀积多晶硅 光刻多晶硅光刻多晶硅2022-4-29P-well生长栅
9、极氧化膜生长栅极氧化膜P-well淀积多晶硅淀积多晶硅P-well涂胶光刻涂胶光刻多晶硅光刻板多晶硅光刻板P-well多晶硅刻蚀多晶硅刻蚀2022-4-29掩膜4 ：P+区光刻区光刻 1、P+区光刻区光刻 2、离子注入、离子注入B+，栅区有多晶硅做掩蔽，栅区有多晶硅做掩蔽， 称为硅栅自对准工艺。称为硅栅自对准工艺。 3、去胶、去胶P-wellP+N+N+P+N-SiP-wellP-wellP+P+2022-4-29P-wellP+P-wellP+P+硼离子注入硼离子注入去胶去胶2022-4-29掩膜5 ：N+区光刻区光刻 1、N+区光刻区光刻 2、离子注入、离子注入P+，栅区有多晶硅做掩蔽，栅
10、区有多晶硅做掩蔽， 称为硅栅自对准工艺。称为硅栅自对准工艺。 3、去胶、去胶P-wellP+N+N+P+N-SiP-wellP-wellP+P+N+N+2022-4-29P-wellN+P-wellP+P+磷离子注入磷离子注入去胶去胶P+P+N+N+2022-4-29掩膜6 ：光刻接触孔：光刻接触孔1、淀积、淀积PSG.2、光刻接触孔、光刻接触孔3、刻蚀接触孔、刻蚀接触孔P-wellP+N+N+P+N-SiP-wellP-wellP+P+N+N+磷硅玻璃（磷硅玻璃（PSG)2022-4-29掩膜6 ：光刻接触孔：光刻接触孔P-wellP+P+N+N+淀积PSGP-wellP+P+N+N+光刻接
11、触孔P-wellP+P+N+N+刻蚀接触孔P-wellP+P+N+N+去胶2022-4-292022-4-29掩膜7 ：光刻铝线：光刻铝线1、淀积铝、淀积铝.2、光刻铝、光刻铝3、去胶、去胶P-wellP-wellP+P+N+N+2022-4-29P-wellP+P+N+N+铝线铝线PSG场氧场氧栅极氧化膜栅极氧化膜P+区区P-wellN-型硅极板型硅极板多晶硅多晶硅N+区区2022-4-29Example: Intel 0.25 micron Process5 metal layersTi/Al - Cu/Ti/TiNPolysilicon dielectric2022-4-29Interconnect Impact on Chip2022-4-29掩膜8 ：刻钝化孔：刻钝化孔CircuitPADCHIP